APA
Paul Jespers, . (2014). The g m /I D Methodology, A Sizing Tool for Low-voltage Analog CMOS Circuits. Germany: Springer.
Chicago
Paul Jespers, . 2014. The g m /I D Methodology, A Sizing Tool for Low-voltage Analog CMOS Circuits. Germany: Springer.
Harvard
Paul Jespers, . (2014). The g m /I D Methodology, A Sizing Tool for Low-voltage Analog CMOS Circuits. Germany: Springer.
MLA
Paul Jespers, . The g m /I D Methodology, A Sizing Tool for Low-voltage Analog CMOS Circuits. Germany: Springer. 2014.