TY  - BOOK
AU  - Prashant Saxena, Rupesh S. Shelar, Sachin S. Sapatnekar
TI  - Routing Congestion in VLSI Circuits: Estimation and Optimization
SN  - 387485503
PY  - 2014///
CY  - Germany
PB  - Springer
KW  - Routing Congestion in VLSI Circuits: Estimation and Optimization
UR  - http://link.springer.com/book/10.1007/0-387-48550-3
ER  -