APA
Kothanda Uma Umamageswaran, . (2000). Formal Semantics And Proof Techniques For Optimizing VHDL Models. Germany: Springer.
Chicago
Kothanda Uma Umamageswaran, . 2000. Formal Semantics And Proof Techniques For Optimizing VHDL Models. Germany: Springer.
Harvard
Kothanda Uma Umamageswaran, . (2000). Formal Semantics And Proof Techniques For Optimizing VHDL Models. Germany: Springer.
MLA
Kothanda Uma Umamageswaran, . Formal Semantics And Proof Techniques For Optimizing VHDL Models. Germany: Springer. 2000.